Electronic circuits, such as integrated microcircuits, are used in a variety of products, from automobiles to microwaves to personal computers. Designing and fabricating microcircuit devices typically involves many steps, sometimes referred to as the “design flow.” The particular steps of a design flow often are dependent upon the type of microcircuit, its complexity, the design team, and the microcircuit fabricator or foundry that will manufacture the microcircuit. Typically, software and hardware “tools” verify the design at various stages of the design flow by running software simulators and/or hardware emulators. These steps aid in the discovery of errors in the design, and allow the designers and engineers to correct or otherwise improve the design. These various microcircuits are often referred to as integrated circuits (IC's).
Several steps are common to most design flows. Initially, the specification for a new circuit is transformed into a logical design, sometimes referred to as a register transfer level (RTL) description of the circuit. With this logical design, the circuit is described in terms of both the exchange of signals between hardware registers and the logical operations that are performed on those signals. The logical design is typically described by a Hardware Design Language (HDL), such as the Very high speed integrated circuit Hardware Design Language (VHDL). The logic of the circuit is then analyzed, to confirm that it will accurately perform the functions desired for the circuit.
After the accuracy of the logical design is confirmed, it is converted into a device design by synthesis software. The device design, which is typically in the form of a schematic or netlist, describes the specific electronic devices (such as transistors, resistors, and capacitors) that will be used in the circuit, along with their interconnections. This device design generally corresponds to the level of representation displayed in conventional circuit diagrams. The relationships between the electronic devices are then analyzed, to confirm that the circuit described by the device design will correctly perform the desired functions. This analysis is sometimes referred to as “formal verification.” Additionally, preliminary timing estimates for portions of the circuit are often made at this stage, using an assumed characteristic speed for each device, and incorporated into the verification process.
Once the components and their interconnections are established, the design is again transformed, this time into a physical design that describes specific geometric elements. This type of design often is referred to as a “layout” design. The geometric elements, which typically are polygons, define the shapes that will be created in various layers of material to manufacture the circuit. Typically, a designer will select groups of geometric elements representing circuit device components (e.g., contacts, channels, gates, etc.) and place them in a design area. These groups of geometric elements may be custom designed, selected from a library of previously-created designs, or some combination of both. Lines are then routed between the geometric elements, which will form the wiring used to interconnect the electronic devices.
Integrated circuit layout descriptions can be provided in many different formats. The Graphic Data System II (GDSII) format is popular for transferring and archiving two-dimensional graphical IC layout data. Among other features, it contains a hierarchy of structures, each structure containing layout elements (e.g., polygons, paths or poly-lines, circles and textboxes). Other formats include an open source format named Open Access, Milkyway by Synopsys, Inc., EDDM by Mentor Graphics, Inc., and the more recent Open Artwork System Interchange Standard (OASIS) proposed by Semiconductor Equipment and Materials International (SEMI). These various industry formats are used to define the geometrical information in integrated circuit layout designs. Once the microcircuit device design is finalized, the layout portion of the design can be used by fabrication tools to manufacturer the device using a lithographic process.
There are many variations of lithography that can be used to manufacture a circuit, but most variations include a series of steps that deposit layers of different materials on a substrate, expose specific portions of each layer to radiation, and then etch the exposed (or non-exposed) portions of the layer away. For example, a simple semiconductor device component could be manufactured by the following steps. First, a positive type epitaxial layer is grown on a silicon substrate through chemical vapor deposition. Next, a nitride layer is deposited over the epitaxial layer. Then specific areas of the nitride layer are exposed to radiation, and the exposed areas are etched away, leaving behind exposed areas on the epitaxial layer, (i.e., areas no longer covered by the nitride layer). The exposed areas then are subjected to a diffusion or ion implantation process, causing dopants, for example phosphorus, to enter the exposed epitaxial layer and form charged wells. This process of depositing layers of material on the substrate or subsequent material layers, and then exposing specific patterns to radiation, etching, and dopants or other diffusion materials, is repeated a number of times, allowing the different physical layers of the circuit to be manufactured. It is often said that the lithographic process “prints” the features onto the substrate. Additionally, the features or image created on the substrate is often referred to as the “printed image.”
As indicated above, lithography causes features to be created on a wafer in part by controlling light or radiation as it hits the wafer. For each step of exposing the wafer to radiation, a mask is used to prevent some areas of the wafer to exposure. Another factor that effects how a pattern or feature is printed is the radiation source. As those of skill in the art understand, the brightness of the radiation source and the pattern of the radiation source as it illuminates the mask effects the printed image. Illumination sources may be formed by hard stop apertures or by programmable sources. Programmable sources are advantageous because they enable complex sources not possible with hard stop apertures. The source shape or pattern formed by the programmable source is often referred to as the source illuminator shape or the source illuminator profile.
As designers and manufacturers continue to increase the number of circuit components in a given area and/or shrink the size of circuit components, the shapes reproduced on the substrate become smaller and are placed closer together. This reduction in feature size increases the difficulty of faithfully reproducing the image intended by the layout design onto the substrate. To account for this, designers have developed various source and mask optimization methods. Some are discussed in Optimum Mask And Source Patterns To Print A Given Shape, by Alan E. Rosenbluth et al., JM3 1(1), April 2002, Improved Mask And Source Representations For Automatic Optimization Of Lithographic Process Conditions Using A Generic Algorithm, by T. Fuhner et al., SPIE Vol. 5754, 2004, U.S. Pat. No. 7,245,354, entitled Source Optimization For Image Fidelity And Throughput, issued Jul. 17, 2007 to Yuri Ganik, and Fast Pixel Based Optimization For Inverse Lithography, by Yuri Granik, JM3 5(4), 2006, which articles are incorporated entirely herein by reference.
The methods discussed above however do not always result in a solvable optimization problem. Additionally, due to the complex nature of the lithographic process, optimization processes that account for both the source illuminator and the mask are extremely time consuming to solve. For example, optimizing a source and a mask for less than 5% of a modern design can take months of computer processing time. This is even true with modern distributed computing techniques.